IAR Embedded Workbench for AVR 5.40 will then work on a Windows XP 64-bit system.Īll product names are trademarks or registered trademarks of their respective owners. New MICROCHIP ATATMEL-ICE Hardware Debuggers Atmel-ICE debugger . If you install AVR Studio Version 4.18, with Service packs 1 and 2, this will update the USB drivers, and the firmware in the JTAGICE mkII. The tool works on AVR microcontrollers using UPDI, JTAG, PDI, debugWIRE, aWire. The JTAGICE mkII driver can, from version 5.40, be used on 64-bit versions of Windows Vista and Windows 7 but not 64-bit XP. The batch file is located in the directory avr\drivers in the product installation.įor IAR Embedded Workbench for AVR version 6.11 and later, follow the instructions in the JTAGICE mkII Driver Release Notes (the driver installation package is for example named AVRJungoUSB.exe, AtmelUSB.exe or AtmelUSBInstaller.exe - located in avr\drivers\Atmel).įor IAR Embedded Workbench for AVR version 6.80.1 through 6.80.8, Jungo version 12 is used.įor IAR Embedded Workbench for AVR version 6.80.9 and 7.10.1 and later, Jungo drivers have been replaced by WinUSB drivers. You need to manually install this driver as recommended in the Release Notes for the JTAGICE mkII driver.įor IAR Embedded Workbench for AVR version 5.40 to 6.10, run the batch file install.bat. These versions use a new version of the Jungo driver (v10.1.00). If you have upgraded to IAR Embedded Workbench for AVR version 5.40 or later:.The API header file is available for download: XJAPI.When debugging a project the following message appears: Failed to initialize USB driver: error 0x2000001c ("Incorrect WinDriver version installed") Solution We can craft the API to meet whatever needs you have for the system. The hardware can be sold separately from the software, with a simple-to-use DLL API interface. The advanced auto-skew control enables you to get the maximum frequency out of your JTAG chain and cable while the configurable voltage levels allow you to connect directly to most TAPs (Test Assess Ports). XJLink2 has variable signal termination, so it can handle boards both with and without signal termination. This is especially useful if testing has to be done in the field or in a very busy lab. XJLink2 can work with a laptop PC with a USB port and can supply power to low-power target systems, so testing can be done even without a source of mains power. Can be configured to Xilinx Parallel ®, Altera ByteBlaster ®, ARM Multi-ICE ®, or any other pinout currently in use. The ability to change the pinmap for the JTAG signals simplifies the process of connecting your XJTAG test system to the Unit Under Test. The 20-way connector is configurable from your test system. Only a simple cable assembly is required to connect to up to 4 JTAG chains on your target board – no extra adapters are needed. This also means you aren’t tied to one machine to do your XJTAG testing. Serial Vector File (SVF) is supported in Intel FPGA devices using third party programming tools. This allows you to easily move your licenses around on and off site to give you maximum flexibility. The JTAG configuration scheme uses the IEEE Standard 1149.1 JTAG interface pins and supports the JAM Standard Test and Programming Language (STAPL) standard. The controller contains the license for your XJTAG system. Available in two colours allowing users to differentiate between units with different licences.Simple DLL API interface: includes commands such as tmsReset() irScan() drScan() etc.Selectable measurement period of 1 ms, 10 ms, 100 ms, 1 s, 10 s.Built in voltage meter on all I/O pins.Can supply power to the target board through the JTAG connector (3.3 V, Familiarise yourself with this port and which pins are which on the device you have in front of you. The layout appears to be in line with a standard 14-pin EJTAG 2.6. Spare pins can be used to control other items - e.g. As you do, its easiest to unplug the small antenna (black) from the board and leave it in the chassis.Pins can also be used as general purpose I/O during testing, for example for fast Flash programming.Spare pins on the JTAG connector can be used in place of the button or to indicate the test status.High speed USB 2.0 interface, backwards compatible with USB 1.0
0 Comments
Leave a Reply. |